SPICE Model
PDK
Standard Cell
Layout Editor
Support GDS 100GB, 10 million net-scale data, lifting restrictions on the number of cells or layers
Industry-leading high-performance display, editing, data conversion, etc.
Integrated polygon input, rule-driven, net-driven, constraint-driven editing, hierarchical design, and push-aside functions
Rule-driven editing with automatic electric potential recognition and Net tracking
Seamless conversion from schematic to layout using Net-Driven method for SDL (schematic/netlist to layout)
Powerful crossprobe function for interactive schematic/layout placement and routing
Support analysis, learning, automatic editing and calling, and other functions
Support efficient development of Python and C++ scripts
Flexible and scalable design environment
rich design methods
100 GB+ GDS and 10 million net-scale
layout data processing
Polygon design, Rule-Driven, Net-Driven,
Constraint-Driven editing, hierarchical design
Intelligent pattern routing
both interactive and full-automatic modes
AMS circuit
layout design
RF circuit
layout design
Memory circuit
layout design
Flat panel display
layout design
